ginngi engineering

Our customer was developing a video DVR system consisting of dozens of cameras and performing MPEG4 compression and RTP streaming. The system consisted of an industrial PC that implemented all of the software including GUI, streaming and storage functions. A board was needed to input analog video and audio channels, and compress them into MPEG4 streams using high-speed DSP processors. Compressed data was then passed to the Windows system over the PCI bus via proprietary device drivers.

The board consists of eight TI DSP 6402 processors each of which is responsible for compressing a single video channel at 2CIF resolution. A common internal bus connects all of the DSPs together terminating at a PLX PCI bridge. Each DSP provides a dedicated interrupt which is used to indicate to the Windows device driver when to pull data from the respective channel. In addition a Xilinx Spartan FPGA is used to implement all of the local bus control and interrupt servicing as well as simple IO.

The board was implemented using a 14-layer stack-up with careful separation of signals to minimize cross-talk and ground-bounce.

A custom device driver and a DLL was written under Windows to provide access to the board and an API was implemented for applications programming.